SMART Group - Surface Mount and Related Technologies

SMART/NPL Process, Design & Reliability Seminar

When: Back to Calendar November 9, 2017 @ 9:30 am - 4:00 pm
Where: NPL, Teddington
Cost: £85.00 - £175.00 Non Member plus VAT
Contact: Keith Bryant
00 44 7946133531
info@smartgroup.org

NPL/SMART Process, Design & Reliability Seminar
9th November 2017, NPL, Teddington, UK
Tea and Coffee from 9.00am in the exhibition area Globe House

This regular NPL & SMART Group seminar will showcase the latest research and results from NPL projects looking at solder joint and contamination failure, coating thickness measurement, solder joint reliability, high temperature reliability for alternative solders and substrates materials plus each delegate has the opportunity to access the Groups Report Database to download free reports on many of the projects

Presentations include

Whisker Mitigation: 1000 Days of Testing to Evaluate Conformal Coatings
Performance and Lifetime of Printed Semiconductors
Condensation Failure and Improved Testing for Electronic Assemblies
High Temperature Electronics and Their Reliability
Factors Affecting Moisture Diffusion in PCBs
UV Non-Destructive Coating Thickness Measurement System
Coatings for High Temperature Applications
Effect of Production Process and laminate Materials on Conductive Anodic Filament (CAF) Failure
Best methods to evaluate assembly reliability, how to test and what to expect in terms of failure with different test methods

To book you place and further information Click Here

To book a table top exhibition space Click Here

For further information on table tops or the seminar email Keith info@smartgroup.org
HTPCBbanner2Seminar Agenda

Seb Wood – Performance and Lifetime of Printed Semiconductors

Printed semiconducting materials have great potential for a range of electronic applications, particularly where large active areas or flexible/stretchable devices are required. This class of materials is expanding rapidly, with specific interest currently in organic semiconductors and hybrid organic-inorganic lead-halide perovskites. As these materials begin to see commercial uptake, their short operational lifetime has become a critical limitation. NPL has developed a suite of tools for monitoring and understanding the degradation mechanisms affecting these devices in order to guide their ongoing development
SIRCondensationbanner1Martin Wickham – Whisker Mitigation: 1000 Days of Testing to Evaluate Conformal Coatings

Spontaneous tin whisker growth leading to electrical short circuits has been an issue across avionics, space and other high reliability applications for many years. Commercial satellites, nuclear reactors, missile systems and automotive applications have all reported complete or partial failures attributed to tin whisker growth. A test vehicle incorporating specially plated SOIC components mounted onto PCBs which have a high propensity to develop tin whiskers has been designed and produced at the UK’s National Physical Laboratory. These test vehicles have been used to undertake trials on different mitigation techniques designed to inhibit tin whisker growth. This work has involved a collaboration between seventeen international industrial partners with the aim of determining the relative reliability of a range of different tin whisker mitigation techniques including twenty conformal coatings. The experimental setup detects the occurrence of electrical shorts between adjacent terminals. These terminals being the pins of bespoke daisy-chained SOIC16W packages; twenty-four of which are mounted on a PCB. Through multiplexing, the experiment has monitored over 3500 components continuously up to 1000 days, with over 48,000 opportunities for failure. The system has captured and stored the resistance state across all components every 15 minutes. The collected data permits the study of the incidence of short circuits, the length of time of each short and the number of intermittent short circuits. We will discuss the rapidity of whisker formation, the formation of intermittent shorts and intermittent duration over the growth period of the whisker.

Ling Zou – Condensation Failure and Improved Testing for Electronic Assemblies

NPL has developed a new test method to accurately control the condensation level on to printed board assemblies during environmental testing. The method provided considerable improvements on existing industry standard tests. NPL’s Electronics Interconnection Group is currently running a multi-partner project to refine the test and fine criteria. This presentation provides an overview of the test methods and some results on evaluating protection performance of conformal coating on electronic circuit from condensation environment
qfnbanner2Kate Clayton – High Temperature Electronics and Their Reliability

NPL has been working in strong partnership with industry to test and measure materials solutions for the high temperature electronics field. Electronics that can operate in high temperature environments will enable sensors and electronics to be moved closer to their application positions, resulting in lighter, more efficient vehicles with lower energy consumption and CO2 emissions.

This presentation will demonstrate the work performed in our group to evaluate PCB substrate materials, interconnects and coatings and understand their performance within high temperature environments. The types of conditions that were used to accelerate testing included dry heat up to 300 °C, damp heat 85 °C/85% RH and thermal cycling -55 °C to 125 °C which highlighted some of the materials challenges faced in operating in these harsh environments.

Adam Lewis – Factors Affecting Moisture Diffusion in PCBs

The effect of ground planes, vias and temperature on moisture diffusion in PCBs has been investigated experimentally and with finite difference modelling. Capacitance measurements between ground planes during moisture uptake and removal have enabled the calculation of diffusion coefficients. The effect of ground plane dimensions, hold density and meshed ground planes have been also investigated. Results show that the presence of ground planes can increase the bake time (required to remove moisture) from several hours to months due to the extra perpendicular distance for the moisture to diffuse. This work demonstrates the importance of PCB storage conditions.

Vimal Gopee – UV Non-Destructive Coating Thickness Measurement System

The lifetime and reliability of electronics made to operate in harsh environments can be enhanced by conformal coatings applications. These polymer based coatings provide a barrier to air-borne contaminants from the operating environment, thus preventing attack from moisture, aggressive chemicals, salt sprays, etc. The protection of discrete components mounted on PCBs, such as resistors, capacitors, packages and passive components, can be achieved by the application of conformal coating using methods such as dipping, selective robot coating, spraying and brushing

Conformal coating should completely cover the assembly and provide a good cover of sharp edges and other contours. There are, however, no reliable non-destructive methods for monitoring the coating thicknesses on common problem areas on PCBs. We will discuss a novel, non-destructive, UV inspection system, capable of measuring the conformal coating thicknesses on step edges of components. We will have a proof of concept instrument on display with live demonstrations of the technique. Measurement of real assemblies will be demonstrated on the day.

Martin Wickham – Coatings for High Temperature Applications

Reliable operation of electronics at higher temperatures requires a combination of performance improvements in components, interconnects and substrates. Ceramic based substrate options can be costly, heavy and prone to mechanical damage. Printed circuit board (PCB) options are restricted to lower working temperatures of the organic resins and degradation of their conductive tracks. A collaborative research programme has successfully developed innovative materials specifically designed to offer protection to organic PCBs and interconnect allowing them to operate at higher temperatures or for longer durations. Details of the electrical performance of component and PCB interconnects between the substrates and components during the test regimes are given as well as the degradation mechanisms experienced in unprotected PCAs.

Ling Zou – The Effect of Production Process and laminate Materials on Conductive Anodic Filament (CAF) Failure

Conductive Anodic Filament (CAF) formation is an important failure mode for Printed Circuit Board (PCB) exposed to high temperature and humidity harsh environment under high voltage condition. CAF failure can be caused by many variables; this presentation emphasised on PCB manufacture process and laminate materials. A PCB contained three pitches via CAF patterns was designed and manufactured by two PCB houses using their own processes. Insulation Resistance (IR) on these PCB were monitored under 85 °C/85% RH with different voltages, and the PCBs went through different reflow cycles. Time to failure (TTF) was defined from Insulation Resistance (IR) curve and normalised to investigate the effect strength of different variables on CAF failure. The results clearly show that each PCB process step has significant effect on CAF performance for completed PCB rather than the materials.

Martin Wickham/Vimal Gopee – Best methods to evaluate assembly reliability, how to test and what to expect in terms of failure with different test methods

Proving reliability in electronic assemblies can be complex and finding a test regime that is both meaningful and cost effective is difficult. Considerable testing has been conducted over the years by NPL to help define actual reliability data in a wide variety of accelerated environments. This presentation will discuss the applicability of accelerated test regimes, test methods and test samples required, typical results and common product failures, and applicable standards. The advantages of combinational testing will also be discussed

Each delegate will receive a copy of all the slides presented, two HT Project Reports plus a set of SMART Group High Temperature Soldering & Defect Guide Posters