SMART Group

SOLDERTEC paid host to SMART Group/LEADOUT delegates for a packed day of hands-on process demonstrations and theory on how to achieve zero defects with lead-free. "Eliminating soldering defects starts with the knowledge that the process has its limits and not all soldering defects can be eliminated with the soldering equipment". "There are many process defects which can be overcome with correct process control but design, PCB specification and component design issues can have a significant role in generating problems for the engineer" stated Bob Willis LEADOUT Project Coordinator for the SMART Group..

35 engineers attended the SMART Group workshop which started with an introduction from Tom Perrett of SOLDERTEC. The size of the workshop was restricted due to the hands on sessions that covered SEM analysis, microsectioning and of course wave soldering with one lead-free alloy, tin/copper + nickel. During the morning Bob Willis covered the basic lead-free wave soldering process, deign rules for conventional and surface mount layout. The most common defects seen on surface mount boards are solder skips on SOT23, chip components and solder shorts on SOICs and QFPs. Lead-free issues like fillet lifting, tearing and pad lift were discussed. The causes and cures for the following defects were covered during the day. There are two new lead-free related products on the SMART Group site, CD-ROMs covering wave soldering and design for manufacture.

During the day Bob Willis was presented with the SOLDERTEC Global Lead-Free Award for his contributions to lead-free process development. The award was presented by David Bishop who is the managing Director of SOLDERTEC.

Following a very enjoyable lunch provided by SOLDERTEC Bob and engineers from Kirsten and SOLDERTEC provided the practical content for the day. Wave Solder test boards were used on the Jet Wave with four different solder finishes showing the different results that could be obtained with and without nitrogen.
SMART Group's Introduction to Wave Soldering and Lead-Free Defect Guide CD-ROM was also available for delegates' to use during the afternoon session. It is an ideal resource for shop floor reference for engineering and production staff alike. The SMART Group website www.smartgroup.org hosts an online wave solder defects guide in the members section of the site. It's an ideal resource for engineers and staff alike to solve problems on-line.

During the day delegates discussed their specific process problems and boards where displayed for review. The problems seen consisted of skipped surface mount joints, solder shorts and solder mask staining.
In the case of skips the most common reason is gassing on the base of the board during contact with the solder wave. This is either due to gassing from the solder mask or too much flux or incorrect pre heat. The examples in question were processed on a machine with only one wave. Ideally a machine with a double wave will give the best performance on any machine. A chip wave followed by a standard wave is accepted by most people as being the optimum.

Solder shorts on 0.020" pitch SOICs, resistor network and Pin Grid Arrays ("PGAs") Ideally the 0.020" SOIC packages and surface mount resistor networks should not be on the base of the board. This design will always give a lower yield during wave soldering. The PGA should be suitable for wave soldering but either a change in orientation or an increase in the amount of flux applied should improve the drainage.
Another great day and one that will be repeated in the coming month.

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